Optimal design of fixed-point and floating-point arithmetic units for scientific applications

The challenge in designing a floating-point arithmetic co-processor/processor for scientific and engineering applications is to improve the performance, efficiency, and computational accuracy of the arithmetic unit. The arithmetic unit should efficiently support several mathematical functions corresponding to scientific and engineering computation demands. Moreover, the computations should be performed as fast as possible with a high degree of accuracy. Thus, this thesis proposes algorithm, design, architecture, and analysis of floating-point arithmetic units particularly for scientific and engineering applications which can be implemented in VLSI. Generally, performance improvements and time efficiency with hardware can be considered from the output rate and the computational latency which is the number of generated outputs per second (output/sec) and the computational times. The output rate can be increased by clock rate whereas the design and architecture of the hardware can improve the computational time, which is mostly focused on engineering practice. Obviously, in order to achieve the highest performance, the design will be based on pipeline architecture. Nevertheless, for any hardware arithmetic unit, not only the performance and time efficiency have to be examined, but also the computational accuracy and stability of the computational results have to be taken into account. Therefore, the floatingpoint arithmetic units introduced in this dissertation will be considered in their design and architecture based on pipeline, and an analysis of the hardware trade-off between the VLSI areas of complexity and computational latency. Meanwhile, the floating-point data representation is employed to improve and stabilize the computational result and accuracy of the arithmetic unit at runtime. The arithmetic units from a hardware point of view can be classified into two groups depending on hardware-based algorithms, i.e. the basic arithmetic unit and the advanced arithmetic unit. The basic arithmetic unit consists of two types of operations corresponding to the number of input operands, i.e. standard operations and non-standard operations. The standard operations are addition/subtraction and multiplication operations and the non-standard operations are product-of-sum and sum-of-product operations. The advanced arithmetic unit is frequently employed in scientific and engineering applications as elementary functions such as sine, cosine, hyperbolic sine, hyperbolic cosine, etc. The two classes of arithmetic units can be derived in hardware-based algorithmic form which is relatively easy for VLSI implementation and for analysis.